Cadence Design Systems, Inc. (NASDAQ: CDNS) said its CadenceÂ® Innovusâ¢ Implementation System has achieved V0.9 certification for TSMC´s 10nm FinFET process and is currently on track to complete V1.0 in Q4 2015.
The Innovus Implementation System is a next-generation physical implementation tool that incorporates integrated signoff engines that have been validated by TSMC on high-performance reference designs, providing customers with a fast path to implementation, closure, and optimal power, performance and area (PPA).
The Innovus Implementation System offers customers key technologies needed to stay in front of the competition using the TSMC 10nm process.
Cadence enables global electronic design innovation and plays an essential role in the creation of today´s integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry.