Faraday Technology Corporation (TWSE: 3035), an ASIC design service and IP provider, has introduced its M1+ standard cell library on UMC 28HPC process, the company said.
Library routability is always a major concern for back-end layout engineers at advanced process technologies. This optimized M1+ library supports the essential multi-track cells (7T/9T/12T), multi-Vt cells (LVT/RVT/HVT), and Faraday low-power PowerSlashâ¢ kit to build the best portfolio of power, performance, and area metrics which are critical to optimizing digital design implementations targeted at diverse market applications.
Taking full advantage of its ASIC implementation and library development experience, Faraday M1+ library can leverage the routing resources for customer designs to optimize area, and routing time. Comparing to other libraries, the M1+ Library has yielded a 14% reduction of silicon area, with a 43% decrease in leakage power consumption, while maintaining the same performance for digital IPs such as ARM cores and the high-end video codecs. As the results, it helps satisfy customer demands on low-power, high-density, and high-speed applications.
Faraday Technology Corporation (TWSE: 3035) is a ASIC design service and IP provider, certificated to ISO 9001 and ISO 26262. The broad silicon IP portfolio includes I/O, Cell Library, Memory Compiler, ARM-compliant CPUs, DDR2/3/4, low-power DDR1/2/3, MIPI, V-by-One, USB 2.0/3.1 Gen 1, 10/100/1000 Ethernet, Serial ATA, PCI Express, and programmable SerDes, etc. Headquartered in Taiwan, Faraday has service and support offices around the world, including the US, Japan, Europe, and China. For more information, visit www.faraday-tech.com or follow Faraday on LinkedIn.