Cadence releases PCI Express 5.0 Verification IP

Cadence Design Systems, Inc. (NASDAQ: CDNS) has announced the availability of the industry´s first Verification IP (VIP) in support of the new PCI Express® (PCIe®) 5.0 architecture, the company said.

The Cadence® VIP incorporates TripleCheck™ technology, which lets designers quickly and thoroughly complete functional verification of server and storage system-on-chip (SoC) designs based on the PCIe 5.0 specification, providing designers with added confidence that designs can function as originally intended.

The differentiated, proven Cadence VIP has supported all recent PCIe standards and has been further optimized for the new 5.0 specification. Adopters of the PCIe 5.0 specification have access to the Cadence TripleCheck technology, which provides a verification plan with measurable objectives linked to the specification features and a comprehensive test suite with thousands of ready-to-run tests to ensure compliance with the specification. This enables designers to save time and deliver higher quality end-products. Additionally, designers have access to the Indagoâ„¢ Protocol Debug App, which provides protocol-specific interactions between the design, the VIP and the testbench to find the root cause of any design bugs.

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company´s System Design Enablement strategy helps customers develop differentiated products–from chips to boards to systems–in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine´s 100 Best companies to Work For. Learn more at